SE97B_1
?NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 27 January 2010
30 of 53
NXP Semiconductors
SE97B
DDR memory module temp sensor with integrated SPD
8.5.2 LOWER Lower Boundary Alarm Trip register (03h, 16-bit read/write)
The value is the lower threshold temperature value for Alarm mode. The data format is
2s complement with bit 2 = 0.25 癈. RFU bits will always report zero. Interrupts will
respond to the presently programmed boundary values. If boundary values are being
altered in-system, it is advised to turn off interrupts until a known state can be obtained to
avoid superfluous interrupt activity.
8.5.3 CRITICAL Critical Alarm Trip register (04h, 16-bit read/write)
The value is the critical temperature. The data format is 2s complement with
bit 2 = 0.25 癈. RFU bits will always report zero.
Table 18. LOWER - Lower Boundary Alarm Trip register bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
RFU
RFU
RFU
SIGN
128 癈
64 癈
32 癈
16 癈
Default
0
0
0
0
0
0
0
0
Access
R
R
R
R/W
R/W
R/W
R/W
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
8 癈
4 癈
2 癈
1 癈
0.5 癈
0.25 癈
RFU
RFU
Default
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Table 19. Lower Boundary Alarm Trip register bit description
Bit
Symbol
Description
15:13
RFU
reserved; always 0
12
SIGN
Sign (MSB)
11:2
-
Lower Boundary Alarm Trip Temperature (LSB = 0.25 癈)
1:0
RFU
reserved; always 0
Table 20. CRITICAL - Critical Alarm Trip register bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
RFU
RFU
RFU
SIGN
128 癈
64 癈
32 癈
16 癈
Default
0
0
0
0
0
0
0
0
Access
R
R
R
R/W
R/W
R/W
R/W
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
8 癈
4 癈
2 癈
1 癈
0.5 癈
0.25 癈
RFU
RFU
Default
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Table 21. Critical Alarm Trip register bit description
Bit
Symbol
Description
15:13
RFU
reserved; always 0
12
SIGN
Sign (MSB)
11:2
-
Critical Alarm Trip Temperature (LSB = 0.25 癈)
1:0
RFU
reserved; always 0
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